1. Field of the Invention
The present invention relates to a semiconductor storage device and, more particularly, a semiconductor storage device having a memory cell for storing data by using a difference in a threshold voltage.
2. Description of the Background Art
A semiconductor storage device capable of storing information by injecting electrons into a floating gate (FG) or extracting the electrons has been developed such as a flash memory. Flash memory includes a memory cell having a floating gate, a control gate, a source and a drain. Memory cell has its threshold voltage increased when electrons are injected into the floating gate and has its threshold voltage decreased when the electrons are extracted from the floating gate.
Here, scale-down of a semiconductor process makes an expansion of a distribution of Vth (threshold voltage) derived from FG-FG coupling (hereinafter referred to as Vth fluctuation) be extremely large. FG-FG coupling is a phenomenon that when a potential of an FG is varied by injection or extraction of electrons into/from the FG, a potential of an adjacent FG is varied as well due to parasitic-capacitance between the FGs to fluctuate a threshold voltage of a memory cell.
In order to solve the problem, such a semiconductor storage device as will be described in the following is disclosed, for example, in Japanese Patent Laying-Open No. 2004-192789 (Patent Literature 1). More specifically, to a memory cell in which data of i (i denotes a natural number not less than 2) bits is stored, before storing subsequent data, data of not more than i bits is written to an adjacent memory cell. The writing of the data of not more than i bits is executed at a voltage lower than an original threshold voltage (actual threshold voltage at the time of storing i-bit data). After the writing to the adjacent memory cell, writing is executed to increase the threshold voltage of the memory cell which stores the i-bit data. Before and after the writing to increase the threshold voltage, it will be unclear that the i-bit data is at an original threshold voltage or a voltage lower than the threshold voltage. For the discrimination thereof, prepare a memory cell for flag (flag cell) to execute reading operation according to data of the flag cell.
The semiconductor storage device recited in Patent Literature 1, however, is structured to prevent a reading error due to Vth fluctuation caused by the effect of a memory cell adjacent to a memory cell to be read (hereinafter referred to as an adjacent memory cell) in the same word line, so that it is impossible to prevent a reading error due to Vth fluctuation caused by the effect of an adjacent memory cell in other adjacent word line (hereinafter referred to as an adjacent word line). In addition, with the semiconductor storage device recited in Patent Literature 1, a reading error caused by Vth fluctuation of a memory cell storing data of not a plurality of bits but one bit can not be prevented. The semiconductor storage device recited in Patent Literature 1 therefore has a problem that a reading error caused by Vth fluctuation can not be satisfactorily prevented.
Also known is a method of preventing a reading error caused by Vth fluctuation by expanding a Vth window, that is, a range of a threshold voltage of a memory cell. When a lower-limit threshold voltage of a Vth window is decreased, however, a leakage current is liable to flow to cause a problem of erroneous reading. On other hand, increasing an upper-limit threshold voltage of the Vth window results in lowering a writing speed. Moreover, because electrons in an FG are liable to go out from the FG for returning to a thermally equilibrium state and because in a memory cell whose threshold voltage is high, the number of electrons accumulated in the FG is large, an increase in the upper-limit threshold voltage of the Vth window invites electrons to go through the FG, so that the threshold voltage of the memory cell is liable to lower to deteriorate retention characteristics (data holding characteristics). In other words, expanding a Vth window involves degradation in reliability of a semiconductor storage device.